Agent Skills: fpga-design

Patterns for FPGA development including RTL design (Verilog/VHDL), timing closure, clock domain crossing, high-level synthesis, and verification. Covers both traditional HDL and modern HLS approaches. Use when ", " mentioned.

UncategorizedID: omer-metin/skills-for-antigravity/fpga-design

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pnpm dlx add-skill https://github.com/omer-metin/skills-for-antigravity/fpga-design

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